The flyback circuit used on the V1.01 boards use a diode to recirculate the flyback current of the injector when they close. For most applications, this method of flyback voltage suppression will work well. However, if you have an application where you have low idle pulse width (in order of 1 milliseconds or so), then an alternate flyback scheme will close the injectors quicker, which should gain around 0.4 - 0.8 milliseconds - this time can be use to lengthen the idle pulse width, thus increasing idle control.
For a full detailed description on the circuit, see the V2.2 circuit description page. In short, a PNP transistor is used as a power Zener diode, this configuration yields sufficient power dissipation for PWM current limiting. This modification is used on the V2.2 boards. However, if you want to perform this modification to a V1.01 board, use the following illustration as a reference:
The illustration is self-explanatory. You replace D6 and D10 with 1N4001 diodes, and place the standing up on the right-side holes on the PCB - the banded end are facing up. The free leads from D6 and D10 are connected together, and then a jumper wire connects them to the emitter of the PNP transistor. The leads of the PNP transistor are bent upwards and the 270 resistor and zener diode are soldered directly on the PNP transistor leads.
To mount the PNP power transistor, use the screw which holds the voltage regulator to the underside of the PCB - this will make a sandwich of transistor, PCB, and regulator. You may need to use a mica insulator between the PNP transistor and the top surface of the PCB - there are traces close by and you need to verify that they will not become shorted when the PNP transistor is mounted. One thing to note is that the ground return path is via the mounting bolt, which is also tying the voltage regulator to the board. This bolt must remain secure, otherwise the ground return path is lost and the FETs will self-distruct. You can use finger nail polish on the bolt threads as a thread locker, or use Locktite, or jam two nuts together for a physical lock. You can also run a jumper wire from the PNP transistor center lead to any source of ground on the board (ground plane).
Now, after performing the modification, you will need to increase your PWM duty cycle compared to the simple diode recirculation - numbers around 60 - 80% are normal. Once you have the engine running, you can alter the PWM settings (do this at idle), lowering the duty cycle until you notice a drop-off in idle speed, then raiding back up 10% or so above this point. Do the same with the PWM start time - you may have to re-adjust each one of these back and forth a few times to find the optimum numbers.
Also, after performing the mod and with the engine running, check the heat of the PNP transistor and the 270-ohm resistor - if these get really warm, then you will need to either increase the resistance (try 330 or 390 ohm, 1/2 watt), or lower the Zener diode breakdown rating - try a value like 26 volts or so. If the PNP transistor gets hot, you may need to remote-mount it on the case. The amount of heat generated is application-dependent. Also, be sure to check these after doing a hard run (with long pulse widths) - make sure they do not get overly hot.
The MC34151 (FET Driver) device has a worst-case switching time of 30 ns, the nominal number is somewhere around 15 nanoseconds. 30 nanoseconds out of 15 KHz is a very small percent of the comparable time. And, the MC34151 is rated to swing up to 1.5 amps peak gate currents. In our case, the 22 ohm gate resistor limits the gate peak current to roughly 0.5 amps. The FET gate is nothing more than a capacitor - the bigger the FET, the bigger the capacitor. For the IRFZ34N FET, the gate capacitance is 700 pf, which is not a 'small' capacitor - this is why it is hard to switch large FETs at very high frequencies, you have to get the charge in and out of the gate quickly. Our 15KHz frequency is very slow compared to the upper potential operating frequency of the FET. To obtain the peak gate current, use I = C * (deltaV/deltaT), with C being the gate capacitance, deltaV is the change in voltage in deltaT time. For our numbers, I = 700 pf * (12 V / 30 ns) = 280 ma, which we can flow with the 22 ohm gate current limit of 500 ma. The nominal switching time of 15 ns is right at the gate limit current. All this means that the FET can switch at 15 to 30 ns. Incidentally, this is the reason why it is difficult to perform efficient switching with logic-level FETs driven off of the processor port. You can use them for simple slow switches, but if you use them in a high-speed repetitive PWM application, the gate current source and sink from the processor I/O pin will cause problems, like reset, heat, etc. You can increase the gate series resistance, but then the switching time is increased and you then live in that "linear" region where Rds(on) is high, and hence increased package power dissipation. It is best to use a driver circuit for this (like the MC34151 or similar).